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ASAHI KASEI
[AKD4368-A]
AKD4368-A
Evaluation board Rev.1 for AK4368
GENERAL DESCRIPTION The AKD4368 is an evaluation board for 24bit DAC with built-in Headphone Amplifier, AK4368. The AKD4368 has the interface with AKM's ADC evaluation boards. Therefore, it's easy to evaluate the AK4368. The AKD4368 also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. Ordering guide
AKD4368 --Evaluation board for AK4368 (Cable for connecting with printer port of IBM-AT compatible PC and control software are packed with this. This control software does not operate on Windows NT.)
FUNCTION * Compatible with 2 types of interface - Direct interface with AKM's A/D converter evaluation boards - On-board AK4114 as DIR which accepts optical input * 10pin header for serial control interface
1.6 ~ 3.6V
GND
5.0V
Regulator 3.0V
LIN RIN MIN
AK4114 (DIR)
Opt In
AK4368
A/D Data 10pin Header
LOUT ROUT HPL HPR
Figure 1. AKD4368 Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual.
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ASAHI KASEI
[AKD4368-A]
1. Evaluation Board Manual Operation sequence
1) Set up the power supply lines. [AVDD] (orange) = 1.6 3.6V [HVDD] (orange) = 1.6 3.6V [D3V] (orange) = 1.6 3.6V [VCC] (red) = 5.0V [AGND] (black) = 0V [DGND] (black) = 0V
: for AVDD, DVDD and PVDD of AK4368 (typ. 2.4V) : for HVDD of AK4368 (typ. 2.4V) : for 74LVC541 and 74LVC245A (typ. 2.4V) : for logic (typ. 5.0V) : for analog ground : for logic ground
Each supply line should be distributed from the power supply unit.
2) Set up the evaluation mode, jumper pins. (See the followings.) 3) Power on. The AK4368 and AK4114 should be resets once bringing SW3 (DAC_PDN) and SW2 (DIR_PDN) "L" upon power-up.
Evaluation mode
In case of the AK4368 evaluation using the AK4114, it is necessary to correspond to audio interface format for the AK4368 and AK4114. About the AK4368's audio interface format, refer to datasheet of the AK4368. About the AK4114's audio interface format, refer to Table 2 in this manual.
Applicable Evaluation Mode (1) PLL Master Mode (2) PLL Slave Mode (3) EXT Slave Mode (3-1) In case of using DIR (Optical Link) (3-2) In case of connecting AK4368 with a external DSP (1) PLL Master Mode
PORT3 (ROM) is used. Nothing should be connected to PORT1 (DIR). MCLK, BICK, LRCK and SDATA are supplied from DSP. It is possible to evaluate at various sampling frequencies using built-in the AK4368's PLL.
27MHz,26MHz,19.8MHz,19.68MHz, 19.2MHz,15.36MHz,14.4MHz,13MHz, 12MHz,11.2896MHz
AK4368
MCKI MCKO BICK LRCK SDATA
DSP or P
256fs/128fs/64fs/32fs 32fs, 64fs 1fs
MCLK BCLK LRCK SDTO
Figure 2. PLL Master Mode
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ASAHI KASEI
[AKD4368-A]
M/S should be set to "H" for SW1. SDTI,LRCK,BICK of PORT3 should be connected to SDTO,LRCK,BICK for DSP. In case of supplying MCKO from DSP, the test pin(MCKO)on sub board should be connected to MCLK of DSP. The system clock can be supplied by two ways below.
1) Supplied MCKI from J17
JP12 PHASE JP13 BICK JP16 MCLK JP17 EXT JP18 LRCK JP19 SDTI
THR
INV
DIR
ADC MCKO EXT DIR
DIR
ADC
DIR
ADC
2) Supplied MCKI from MCLK(PORT3)
JP12 PHASE JP13 BICK JP16 MCLK JP17 EXT JP18 LRCK JP19 SDTI
THR
INV
DIR
ADC MCKO EXT DIR
DIR
ADC
DIR
ADC
(2) PLL Slave Mode PORT3 (ROM) is used. BICK,LRCK,SDATA are supplied from DSP. Nothing should be connected to PORT1 (DIR). MCKO is needed for a synchronous singal of BICK and LRCK. M/S should be set to "L" for SW1.
27MHz,26MHz,19.8MHz,19.68MHz, 19.2MHz,15.36MHz,14.4MHz,13MHz, 12MHz,11.2896MHz
AK4368
MCKI MCKO BICK LRCK SDATA
DSP or P
256fs/128fs/64fs/32fs 32fs, 64fs 1fs
MCLK BCLK LRCK SDTO
Figure 3. PLL Slave Mode The test pin (MCKO) on sub board should be connected to MCLK of DSP. System clock MCKI can be supplied from J17 or PORT3. Setup of jumper pins is same as (1)PLL Master Mode.
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ASAHI KASEI
[AKD4368-A]
(3) EXT Slave Mode
AK4368
MCKO 256fs, 512fs or 1024fs MCKI BICK LRCK SDATA 32fs 1fs MCLK BCLK LRCK SDTO
DSP or P
Figure 4. EXT Slave Mode
(3-1) In case of using DIR (Optical Link)
PORT1 (DIR) is used. DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical connector (TORX176). Nothing should be connected to PORT3 (DSP) and J17. JP17(EXT)should be short. CM0 and M/S should be set to "L" for SW1.
JP12 PHASE JP13 BICK JP16 MCLK JP17 EXT JP18 LRCK JP19 SDTI
THR
INV
DIR
ADC MCKO EXT DIR
DIR
ADC
DIR
ADC
When the AK4114 is used, JP14 (MKFS) and JP15 (BCFS) are not used. Theerfore, JP14 (MKFS) should be set to "x1" and JP15 (BCFS) should be set to "64fs". The AK4114 does not operate under fs = 32kHz. Therefore, this mode corresponds to fs = 32kHz and over.
(3-2) In case of connecting AK4368 with external DSP
PORT3 (ROM) is used. MCLK, BICK, LRCK and SDATA are supplied from PORT3. Nothing should be connected to PORT1 (DIR). JP17(EXT) should be short.
JP12 PHASE JP13 BICK JP16 MCLK JP17 EXT JP18 LRCK JP19 SDTI
THR
INV
DIR
ADC MCKO EXT DIR
DIR
ADC
DIR
ADC
When all interface signals are fed externally, JP14 (MKFS) and JP15 (BCFS) are not used. Therefore, JP14 (MKFS) should be set to "x1" and JP15 (BCFS) should be set to "64fs". JP12 (PHASE) is jumper which decides polarity of BICK, JP12 should be set to "THR" or "INV" according to audio interface format.
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ASAHI KASEI
[AKD4368-A]
DIP Switch set up
[SW1] : Mode Setting of AK4368 and AK4114 ON is "H", OFF is "L". No. 1 2 3 4 5 6 7 Name DIF0 DIF2 CM0 CAD0 CAD1 I2C M/S ON ("H") OFF ("L")
AK4114 Audio Format Setting See Table 2 AK4114 X'tal Mode AK4114 PLL Mode Fixed to "L" Master mode Slave mode
Note: M/S is set "H" when PLL, Master Mode Table 1. Mode Setting for AK4368 and AK4114 Mode 0 1 2 DIF2 0 0 1 1 DIF0 0 1 0 1 AK4114 SDTO 16bit, LSB justified 18bit, LSB justified 24bit, MSB justified 24bit, I2S
(default)
Note: DIF1 is fixed to "L" on the board Table 2. Setting for AK4114 audio interface format
Other jumper pins set up
1. JP1 (GND) : Analog ground and Digital ground OPEN : Separated. SHORT : Common. (The connector "DGND" can be open.) 2. JP14 (MKFS) : MCLK Frequency x1 : 256fs x2 : 512fs x4 : 1024fs 3. JP15 (BCFS) : BICK Frequency 32fs : 32fs frequency 64fs : 64fs frequency
The function of the toggle SW
Upper-side is "H" and lower-side is "L". [SW2] (DIR): Power down of AK4114. Keep "H" during normal operation. Keep "L" when the AK4114 is not used. [SW3] (PDN): Power down of AK4368. Keep "H" during normal operation.
Indication for LED
[LED1] (ERF): Monitor INT0 pin of the AK4114. LED turns on when some error has occurred to AK4114.
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ASAHI KASEI
[AKD4368-A]
Serial Control
The AK4368 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4 (CTRL) with PC by 10 wire flat cable packed with the AKD4368.
Connect PC
CSN CCLK CDTI AKD4368
10 Wire Flat Cable 10pin Connector 10pin Header
Figure 5. Connect of 10 wire flat cable
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ASAHI KASEI
[AKD4368-A]
Input / Output circuit & Set-up jumper pin for Input / Output circuits
(1) Input Circuit External analog signal is fed through the BNC connector. MIN, LIN, RIN Input circuits
J7 MIN C26 1u + R18 (SHORT) MIN
J3 LIN
C21 1u +
R11 (SHORT) LIN
J4 RIN
C23 1u +
R14 (SHORT) RIN
Figure 6. MIN, LIN, RIN Input circuits
(2)
Output Circuit 1) LOUT,ROUT Output Circuit
J14 LOUT
+ LOUT C33 22u + ROUT C37 22u R33 10k R30 10k
R29 220
R32 220
J16 ROUT
Figure 7. LOUT,RO UT Output Circuit
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ASAHI KASEI
[AKD4368-A]
2) HPL, HPR Output Circuit
J2 HPL BNC + HPL C22 47u R12 (SHORT) JP3 HPL HP R13 16
2 1 3 R19 (SHORT) HP JP5 HPR BNC R21 16 J8 HPR J5 HP
+ HPR C27 47u
Figure 8. HPL, HPR Output Circuit
2)-1. Outputs of HPL and HPR pins are applied via J2 and J8.
JP3 HPL JP5 HPR
BNC
HP
HP
BNC
2)-2. Outputs of HPL and HPR pins are applied via J5.
JP3 HPL JP5 HPR
BNC
HP
HP
BNC
* AKM assumes no responsibility for the trouble when using the circuit examples.
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ASAHI KASEI
[AKD4368-A]
2. Control Software Manual Set-up of evaluation board and control software
1. Set up the AKD4368 according to previous term. 2. Connect IBM-AT compatible PC with AKD4368 by 10-line type flat cable (packed with AKD4368). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AK4368 Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of "AKD4368.exe" to set up the control program. 5. Then please evaluate according to the follows.
Operation flow
Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button. 3. Click "Write default" button
Explanation of each buttons
1. [Port Reset] : 2. [Write default] : 3. [All Write] : 4. [Function1] : 5. [Function2] : 6. [Function3] : 7. [Function4] : 8. [Function5]: 9. [SAVE] : 10. [OPEN] : 11. [Write] : Set up the USB interface board (AKDUSBIF-A) when using the board. Initialize the register of AK4368. Write all registers that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet.
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ASAHI KASEI
[AKD4368-A]
Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". If you want to write the input data to AK4368, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box: Data Box: Input registers address in 2 figures of hexadecimal. Input registers data in 2 figures of hexadecimal.
If you want to write the input data to AK4368, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog] : Dialog to evaluate DATT
There are dialogs corresponding to register of 05h and 06h. Address Box: Input registers address in 2 figures of hexadecimal. Start Data Box: Input starts data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4368 by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to AK4368, click [OK] button. If not, click [Cancel] button.
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ASAHI KASEI
[AKD4368-A]
4. [SAVE] and [OPEN]
4-1. [SAVE]
All of current register setting values displayed on the main window are saved to the file. The extension of file name is "akr". (1) Click [SAVE] Button. (2) Set the file name and click [SAVE] Button. The extension of file name is "akr".
4-2. [OPEN]
The register setting values saved by [SAVE] are written to the AK4368. The file type is the same as [SAVE]. (1) Click [OPEN] Button. (2) Select the file (*.akr) and Click [OPEN] Button.
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ASAHI KASEI
[AKD4368-A]
5. [Function3 Dialog]
The sequence of register setting can be set and executed. (1) Click [F3] Button. The default setting sequence DAC->HP(3D=OFF) is displayed. Jump to (3) below if the default setting sequence is used. Go to (2) if the other setting sequence is required. (2) Set the control sequence. Set the address, Data and Interval time. Set "-1" to the address of the step where the sequence should be paused. (3) Click [START] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file name is "aks".
Figure 9. Window of [F3]
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ASAHI KASEI
[AKD4368-A]
6. [Function4 Dialog]
The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed. When [F4] button is clicked, the window as shown in Figure 10 opens.
Figure 10. [F4] window
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ASAHI KASEI
[AKD4368-A]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3]. The sequence file name is displayed as shown in Figure 11. ( In case that the selected sequence file name is "DAC_Stereo_ON.aks")
Figure 11. [F4] window(2) (2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name is "*.ak4". [OPEN] : The name assign of sequence file(*.ak4) saved by [SAVE] is loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function. (2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder. (3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the change.
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ASAHI KASEI
[AKD4368-A]
7. [Function5 Dialog]
The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to buttons and then executed. When [F5] button is clicked, the window as shown in Figure 12 opens.
Figure 12. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr). The register setting file name is displayed as shown in Figure 13. (In case that the selected file name is "DAC_Output.akr") (2) Click [WRITE] button, then the register setting is executed.
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ASAHI KASEI
[AKD4368-A]
Figure 13. [F5] windows(2)
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of register setting file displayed on [Function5] window can be saved to the file. The file name is "*.ak5". [OPEN] : The name assign of register setting file(*.ak5) saved by [SAVE] is loaded.
7-3. Note
(1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder. (2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be loaded again in order to reflect the change.
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ASAHI KASEI
[AKD4368-A]
MEASUREMENT RESULTS
[Measurement condition] * Measurement unit : Audio Precession System Two Cascade * MCLK : 11.2896MHz * BICK : 64fs * fs : 44.1kHz * Bit : 24bit * Measurement mode : EXT Slave mode * Power Supply : VDD = HVDD = 3.3V * Measurement Filter : 10Hz 20kHz * Temperature : Room
Parameter DAC Analog Output Characteristics DAC -> HPAMP THD+N (-3dBFS Output) D-Range (-60dB Output, A-weighted) S/N (A-weighted) DAC -> LOUT THD+N (0dBFS Output) D-Range (-60dB Output, A-weighted) S/N (A-weighted)
Result (Lch / Rch) -56.5 / -57.0 90.7 / 90.7 90.8 / 90.8 -75.8 / -75.7 88.7 / 88.4 88.7 / 88.4
Unit dB dB dB dB dB dB
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ASAHI KASEI
[AKD4368-A]
[Plot of Headphone Amp]
AKM
-20 -25 -30 -35 -40 -45 -50 d B r A -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 -140 -130 -120
AK4368 HP-AMP THD+N vs. Input Level (fs= 44.1kHz, fin= 1kHz)
-110
-100
-90
-80
-70 dBFS
-60
-50
-40
-30
-20
-10
+0
Figure 14. THD+N vs. Input Level
AKM
-20 -25 -30 -35 -40 -45 -50 d B r A -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 20 50
AK4368 HP-AMP THD+N vs. Input Frequency (fs= 44.1kHz, fin= 1kHz)
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 15. THD+N vs. Input Frequency
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ASAHI KASEI
[AKD4368-A]
AKM
+0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140
AK4368 HP-AMP Linearity (fs= 44.1kHz, fin= 1kHz)
-130
-120
-110
-100
-90
-80
-70 dBFS
-60
-50
-40
-30
-20
-10
+0
Figure 16. Linearity
AKM
-0 -2 -4 -6 -8 -10 d B r A -12 -14 -16 -18 -20 -22 -24 20 50
AK4368 HP-AMP Freq response(fs= 44.1kHz, Input Level= -3dB)
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 17. Frequency Response (Boost off) (including external HPF)
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ASAHI KASEI
[AKD4368-A]
AKM
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50
AK4368 HP-AMP FFT(fs=44.1kHz, fin=1kHz, Input Level = -3dB)
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 18. FFT Plot(1kHz,-3dB)
AKM
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50
AK4368 HP-AMP FFT(fs=44.1kHz, fin=1kHz, Input Level = -60dB)
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 19. FFT Plot(1kHz,-3dB)
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ASAHI KASEI
[AKD4368-A]
AKM
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100
AK4368 HP-AMP Noise Floor (No data Input)
200
500 Hz
1k
2k
5k
10k
20k
Figure 20. FFT Plot(Noise Floor)
AKM
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200
AK4368 HP-AMP FFT Out-of-band Noise
500
1k Hz
2k
5k
10k
20k
50k
100k
Figure 21. Out-band Noise
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ASAHI KASEI
[AKD4368-A]
AKM
+0 -10 -20 -30 -40 -50 d B -60 -70 -80 -90 -100 -110 -120 20
AK 4368 HP-AMP Crosstalk (fs= 44.1kHz, Input level= -3dB) Upper@1kHz:Rch-->Lch; Lower@1kHz:Lch-->Rch
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 22. Crosstalk
IMPORTANT NOTICE
* These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability.
* It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
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A
B
C
D
E
RIN
MIN
LIN
LOUT
ROUT
E
DGND CN1
48 47 46 45 44 43 42 41 40 39 38 37
JP1 GND
AGND
E
TP1 AVDD
1
TP2 PVDD
1
+
C12 10u
TP26 LIN
1
R5 10k
TP25 C10 VCOC
1
TP23 MIN
1
TP21 LOUT TP22 ROUT
1 1
CN2
C11 0.1u
B2 A2 B3 1
U1
C17(open)
4.7n TP24 RIN
1
TP20 HPL
1
CN3
A4
B4
A6
B5
A3
A5
A7
PVSS
HPL
MIN
RIN
LIN
NC
NC
VCOC
PVDD
NC
NC HPR
C3 B7
36
D
2
3
B1
MCKO
HVSS
B6
1
A1
TP19 HPR
35
D
NC
HPL
34
HPR
TP3 DVSS
4 1
1
5
6
D1
MCKI
7
C
D2
I2C
AVDD
D7
AVDD
1 1 2
8
BICK
VCOM
R6
9
51
+ C13 47u
2
L2 (short)
10
R7 (short)
F1
SDA/CDTI CAD0/CSN SCL/CCLK
ROUT
E6
1
E2
LRCK
NC
G7
3DCAP1
3DCAP2
R3 10
12
PDN
11
F2
3DCAP3
R4
51
SDATA NC
LOUT
F7
NC
NC
NC
G1
G2
F3
G3
F4
G4
F5
G5
F6
G6
C15
C14
1
1
B
TP27 3DCAP1 4.7n
TP29 470n 3DCAP3 TP28 3DCAP2
1
1
DVDD TP7 SDA/CDTI TP4 TP5 TP6 PDN CAD0/CSN SCL/CCLK
1 1 1 1 13 14 15 16 17 18
TP8 I2C
1 19
TP9 SDATA
1 20 21
TP10 TP11 LRCK BICK
1 22
1
TP12 MCKO
1 24
CN4
A
23
4368_PDN
CAD0/CSN
SCL/CCLK
SDA/CDTI
4368_SDATA
4368_LRCK
4368_BICK
4368_I2C
4368_MCKO
CDTO
SDTO
A
B
C
D
+ +
R2
51
1
E1
E7
TP15 VCOM C4 0.1u
+
AK4368
MUTET
D6
+
R1
51
C3 1u C6 0.1u C16 10u
31
1
C1
DVDD
HVDD
C7
1
30
C
C5 2.2u TP14 MCKI
29
28
EXT_MCLK
27
26
TP13 DVDD
25
DVDD
2
+
C1 10u
C2 0.1u
TP16 HVDD
C8 0.1u
C9 10u
32
1
C2
DVSS
AVSS
C6
TP17 AVSS
TP18 HVSS
33
HVDD
1 2
+
L1 (short)
+ C7 47u
B
A
Title Size
AKD4368-A Rev.0
Document Number
A3
Date:
AK4368
Sheet
E
Rev
A 1
of
Friday, January 07, 2005
6
A
B
C
D
E
E
E
J3 LIN
C21 1u + +
R11(short) LIN + R12 6.8 HPL BNC JP3 HPL HP R13 16
J2 HPL
C22 47u J4 RIN C23 1u + + R14(short) RIN
J5 HP
D
MIN
+
R19 6.8
HPR C27 47u
HP
J7 MIN
C26 1u + +
R18(short)
D
JP5 HPR BNC R21 16
J8 HPR
C
C
C33 22u LOUT R30 10k +
R29 220
J14 LOUT
B
B
C37 22u ROUT R33 10k +
R32 220
J16 ROUT
A
A
Title Size
AKD4368-A Rev.0
Document Number
A3
Date:
A B C D
Input/Output
Sheet
E
Rev
A 2
of
Friday, December 24, 2004
6
A
B
C
D
E
E
E
D
D
EXT_MCLK
EXT_BICK THR
VCC
VCC DIR_BICK
10
DIR JP13 BICK ADC
1
4
U4A 74AC74
Q 5 12 11 D
U4B 74AC74
Q 9
CL
Q
CL
MCKO DIR_MCLK J17 EXT
MCKO DIR EXT
JP16 MCLK
PR
D CLK
PR
2 3
x1 x2 x4
JP14 MKFS
10 11
JP12 PHASE INV
2
BICK
U3
CLK RST Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12
CLK Q 8
6
C
9 7 6 5 3 2 4 13 12 14 15 1
JP15 BCFS 64fs 32fs
U2A
74HC14
13
X_LRCK
1
C
R35 51 JP17 EXT
74HC4040
B
B
A
A
Title Size
AKD4368-A Rev.0
Document Number
A3
Date:
A B C D
CLOCK
Sheet
E
Rev
A 3
of
Friday, December 24, 2004
6
A
B
C
D
E
VCC
1
for 74AC74, 74HC4040, 74HC14, 74HCT157, 74LS07, 74HCT04
1
L3 10u
VCC
2 2
T1
VIN GND
TO92
VOUT 3
L4 47u
E
6 5
PORT1
6 5 GND VCC GND OUT
C39 0.1u
C40 0.1u
C41 0.1u
C42 0.1u
C43 0.1u
C44 0.1u
+ C38 47u
REG C46 0.1u
E
C45 0.1u
4 3 2 1
2
DIR
C47 0.1u
+ C48 10u
R36 470
C49 10u REG + C50 0.1u
VCC
C51 0.47u
R37 18k
41
48
46
45
44
42
39
47
AVSS
VCOM
TEST1
AVDD
INT1
RX3
RX2
RX1
RX0
NC
NC
D
DIF0 DIF2 CM0 CAD0 CAD1 I2C M/S
1 2 3 4 5 6 7
SW1
14 13 12 11 10 9 8
U5
43
40
38
37
1
D
R
1
IPS0
INT0
36
1
U6A
2
R38 1k
2
LED1 ERF
VCC
1
74HCT04
2 NC OCKS0 35
MODE RP1
47k
C
5
DIF1
CM0
32
6
NC
1
7
DIF2
AK4114
PDN
31
6
U2C
5
U2B
4
1
CM0
3
R39 10k
2
7 6 5 4 3 2 1
3
DIF0
OCKS1
34
VCC
CM0 CAD0 CAD1 I2C M/S
4
TEST2
CM1
33
D1 HSU119
C
3
XTI
30
2
8
IPS1
XTO
29
X2 11.2896MHz
C54 5p
C53 0.1u
2 4
1
C52 5p
74HC14
74HC14
L
H SW2 DIR
9
P/SN
DAUX
28
6
U6C
5
U6B
3
SDTO
74HCT04
10 XTL0 MCKO2 27
74HCT04 DAUX
11
B
XTL1
BICK
26
DIR_BICK
B
12
VIN MCKO1 COUT UOUT DVDD BOUT VOUT TVDD DVSS DVSS LRCK TX0 TX1
SDTO
25
DIR_SDTI
13
14
15
16
17
18
19
20
21
22
23
C55 0.1u +
C56 0.1u +
24
DIR_LRCK
DIR_MCLK
VCC
VCC
C57 10u REG
C58 10u
A
5 6
PORT2
5 6 IN VCC IF GND
4 3 2 1
A
DIT
R40 1k
C59 0.1u
Title Size
AKD4368-A Rev.0
Document Number
A3
Date:
A B C D
DIR/DIT
Sheet
E
Rev
A 4
of
Friday, December 24, 2004
6
A
B
C
D
E
U8
E
U7
D3V
20
11
Y8
A8
9
1
M/S
19
DIR
VCC
E
MCKO
12
Y7
A7
8
4368_MCKO RP2
6 5 4 3 2 1 2
G
GND
10
C60 0.1u
4368_SDATA 4368_I2C R41 51 SCL/CCLK R42 51 CAD0/CSN
D
13
Y6
A6
7
A1
B1
18
14
Y5
A5
6
3
I2C 47k
A2
B2
17
6 5 4 3 2 1
RP3
15
Y4
A4
5
4
A3
B3
16
47k
16
Y3
A3
4
5
A4
B4
15
4368_PDN
17
Y2
A2
3
6
A5
B5
14
D
18
Y1
A1
2
7
CAD0 4368_BICK
8
A6
B6
13
10
GND
G2
19
A7
B7
12
BICK
C61 0.1u
20
VCC
G1
1
4368_LRCK
9
A8
B8
11
JP18 LRCK
ADC DIR
X_LRCK DIR_LRCK
74LVC541
74ALVC245
C
D3V + C62 47u D3V EXT_MCLK EXT_BICK MCLK BICK LRCK SDTI VCC
1 2 3 4 5
C
PORT3
10 9 8 7 6
ROM VCC U9 R44 R46 R48
B
R43
1Y 2Y 3Y 4Y 4 7 9 12
VCC
10k 10k 10k
R45 R47 R49
470 470 470
1 2 3 4 5
PORT4
10 9 8 7 6
CSN SCL/CCLK SDA/CDTI CDTO/SDA(ACK)
2 3 5 6 11 10 14 13 1 15
1A 1B 2A 2B 3A 3B 4A 4B A/B G
10k
B
ADC VCC JP19 SDTI DIR
2
DAUX
CTRL
74HCT157 R50 10k
11
DIR_SDTI
D3V CAD1 I2C
1
D2 HSU119
1
U2E
10
9
U2D
8
3
1
R51 1.8k U10A
2
L
H SW3 PDN
2
74HC14 C63 0.1u
74HC14
A
SDA/CDTI
A
74LS07
Title
CDTO R52 51
AKD4368-A Rev.0
Document Number
Size
A3
Date:
C D
LOGIC
Sheet
E
Rev
A 5
of
Friday, December 24, 2004
6
A
B
A
B
C
D
E
E
E
D
D
13
U2F
12
3
U10B
4
74HC14
74LS07 U10C
6
5
9
U6D
74LS07
8 9
74HCT04
U10D
8
74LS07
C
11
U6E
10
74HCT04
11
U10E
10
C
74LS07 U10F
13
U6F
12
13
12
74HCT04
74LS07
B
B
A
A
Title Size
AKD4638-A Rev.0
Document Number
A3
Date:
A B C D
PIN
Sheet
E
Rev A
Friday, December 24, 2004
6
of
6
A
B
C
D
E
E
E
CN1
48 47 46 45 44 43 42 41 40 39 38 37
TP1 AVDD
1
TP2 PVDD
1
+
C12 10u
TP26 LIN
1
TP25 R17 C10 VCOC
1
TP23 MIN
1
TP21 LOUT TP22 ROUT
1 1
10k C17(open)
4.7n TP24 RIN
1
TP20 HPL
1
CN2
C11 0.1u
B2 A2 B3 1
U1
CN3
A4
B4
A6
B5
A3
A5
A7
PVSS
HPL
MIN
RIN
LIN
NC
NC
VCOC
PVDD
NC
NC HPR
C3 B7
36
D
2
3
B1
MCKO
HVSS
B6
1
A1
TP19 HPR
35
D
NC
34
TP3 DVSS
4 1
1
5
6
D1
MCKI
7
C
D2
I2C
AVDD
D7
8
BICK
VCOM
R6
9
51
R7 (short)
10
F1
SDA/CDTI CAD0/CSN SCL/CCLK
ROUT
E6
1
E2
LRCK
NC
G7
3DCAP1
3DCAP2
PDN
11
F2
3DCAP3
R4
51
SDATA NC
LOUT
F7
NC
NC
G1
G2
F3
G3
F4
G4
F5
G5
F6
G6
12
NC
C15
C14
1
1
B
TP27 3DCAP1 4.7n
TP29 470n 3DCAP3 TP28 3DCAP2
1
1
TP7 SDA/CDTI TP4 TP5 TP6 PDN CAD0/CSN SCL/CCLK
1 1 1 1 13 14 15 16 17 18
TP8 I2C
1 19
TP9 SDATA
1 20 21
TP10 TP11 LRCK BICK
1 22
1
TP12 MCKO
1 24
CN4
A
23
A
B
C
D
+ +
R2
51
1
E1
E7
TP15 VCOM C4 0.1u
+
AK4368
MUTET
D6
+
R1
51
C46 1u C6 0.1u C16 10u
31
1
C1
DVDD
HVDD
C7
+
C1 10u
C2 0.1u
TP16 HVDD
C8 0.1u
C9 10u
32
1
C2
DVSS
AVSS
C6
TP17 AVSS
TP18 HVSS
33
+
30
C
C5 2.2u TP14 MCKI
29
28
27
26
TP13 DVDD
25
B
A
Title Size
AK4368-SUB for 41BGA
Document Number
A3
Date:
AK4368
Sheet
E
Rev
A 1
of
Friday, January 07, 2005
6

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